Lecture 04: Motor control & field-effect transistors

Separate the signal path from the power path.

The pin decides when. A transistor and its own supply decide how much.

They meet only at the gate, and at a shared ground.

1. How a transistor works. Doping, the BJT, then the field effect. Why a FET is not just a smaller relay.

2. The MOSFET as a switch. On resistance, gate drive, logic level.

3. Driving the motor. Flyback, grounding, and measuring what you built.

Act 1 is what Lab 4 assumes you already have. It is worth the twenty minutes.

PWM from Lab 3, the photodiode from Lab 1. New this week: the MOSFET in between.

“Functions as expected” needs a definition. Write it down first:

• measured frequency within, say, 5 % of commanded
• measured duty within a stated tolerance
• clean 0 to 3.3 V transitions
• jitter small compared with the period

The answer is a region on a frequency–duty map, not one number.

At 1 kHz, what on-time is a 2 % duty cycle?   At 20 Hz?

If an edge lands only to within 150 $\upmu$s, what is the lowest reliable duty at 1 kHz?

Current. 16 mA per pin. A small motor: hundreds of mA, more at stall.

Inductance. Interrupt the current and the winding fights back: $V_L = -L\,\mathrm{d}I/\mathrm{d}t$.

Back-EMF. A spinning motor is a generator, $V_{\text{back}} = k_e\,\omega$.

You need a part that takes a tiny command from the pin and lets through amperes from another supply.

That part is a transistor. Which kind, and why that kind, is the next twenty minutes.

Silicon has four valence electrons and shares all four in the crystal. Nothing is free to move.

Thermal energy frees the occasional electron, leaving a hole behind. That is an intrinsic semiconductor: a poor conductor and a poor insulator.

Useful devices start by deliberately spoiling this perfect crystal.

Five valence electrons (phosphorus) leaves one over. Three (boron) leaves one missing.

At the junction electrons cross and fill holes. What is left is a depletion layer: no free carriers, and a built-in barrier.

Forward bias pushes carriers in and the barrier collapses at about 0.7 V. Reverse bias widens the depletion layer and nothing flows.

Remember the width of that layer. The JFET is about to control it on purpose.

Instead of injecting carriers, use the electric field from a nearby electrode to change how many carriers the channel already has.

A field costs no steady current to maintain. That sentence is why your 3.3 V pin can command amperes.

Every FET has the same three terminals: gate, drain, source.

The channel is the path from drain to source.

The gate decides how much of it conducts.

Current flows drain to source; the gate only sets the valve position.

Two ways to build that valve: pinch an existing channel, or create one. JFET and MOSFET.

The gate sits on a thin SiO$_2$ layer, so it is no longer a diode. It is a capacitor. At $V_{GS} = 0$ the two n$^+$ wells are isolated by p-type substrate and nothing flows.

Raise $V_{GS}$ and the field pushes holes down and pulls electrons up, until a thin n-type inversion layer bridges the wells. Above $V_{th}$ the device conducts.

Shapes, not datasheet values. What matters is where each curve leaves the axis.

The oxide is a few tens of atoms thick. It buys you the free gate drive, and it is also what static discharge punctures.

Handle the part by its package. Never let the gate float. Respect $V_{GS,\max}$ from the datasheet, usually about $\pm 20$ V.

A dead MOSFET usually died at the gate, not the drain.

The Pi can put only 3.3 V on the gate.

Many power MOSFETs want 10 V. At 3.3 V they half-conduct and get hot.

A logic-level part is fully on at 4–5 V. That is the L. The IRF510 is not.

$\Rds$ is quoted at 5 V. At 3.3 V the part conducts, but less fully.

Run the motor. Measure $V_{DS}$ with the switch on. Feel the package.

Weak motor or a warm device means a gate driver or a level shift. Say what you found.

Supply $\rightarrow$ motor $\rightarrow$ drain. Source to ground.

$V_{GS}$ is gate to source. Source on ground: $V_{GS}$ is simply the pin voltage.

MOSFET above the motor instead: the source rises as it turns on, $V_{GS}$ collapses, it turns itself off.

High side needs a gate driver. Not this lab.

Gate series resistor, a few hundred ohms: limits the current pulse that charges the gate at every edge.

Pull-down, about 10 k$\Upomega$ gate to source: holds the gate at 0 V while the Pi boots, after cleanup(), or if a wire falls out.

A floating gate drifts, and the motor switches itself on.

In either steady state one of the two is off, so no current runs from $V_{DD}$ to ground. A CMOS gate burns power only while it switches.

That is why a processor’s power scales with clock speed, and why your laptop throttles.

Lecture 03: “an output pin is a pair of transistors acting as a two-way switch.”

That pair is this CMOS inverter, on the Pi’s own die. Push–pull is the same idea under another name.

Writing a 1 turns on the upper device; writing a 0 turns on the lower one.

The 16 mA limit is those two small transistors’ on-resistance and thermal rating, nothing more.

Notice what moves together: bigger current ratings come with smaller $\Rds$, and all three parts are quoted at $V_{GS} = 10$ V. The IRL510 is quoted at 5 V, which is the whole point of it.

That calculation assumes the device is ohmic, not saturated.

It holds only while the current the load allows is less than the current the gate drive would permit: $I_{D(\text{sat})} < I_{D(\text{on})}$.

Confirm it from the datasheet, then use $\Rds$.

Switch off: the winding current has nowhere to go. $V_L = -L\,\mathrm{d}I/\mathrm{d}t$ makes whatever voltage it takes, across the drain.

Task 2. Gate from a fixed $+5$ V on the bench supply. The motor runs or it does not: the power path is proven.

Instructor or TA checks the circuit before the motor is powered.

Task 3. Move the gate to BCM 12 through the gate resistor. Now only the signal path is under test.

Swap the LED for a motor, add the flyback diode, and this is Lab 4.

LED on one side of the shaft, photodiode on the other, something that breaks the beam $N$ times per turn.

Or read the pulse period on the scope and invert it.

Wrong $N$ scales every RPM by the same factor and still looks consistent. State it, justify it.

• the TIA, not a bare resistor: gain, and a fixed diode bias
• shield from room light: fluorescents flicker at 120 Hz, right in your RPM range
• look on the scope before writing any counting code

Two traps. Double counting on slow edges. Counting PWM edges instead of the shaft.

Hysteresis. Sweep up from 0, then down from 100 %. The motor keeps turning below the duty that started it.

PWM frequency. The rotor’s time constant is tens of ms. Periods much shorter are averaged; comparable ones jerk. The reference code uses 50 Hz.

A null result honestly reported is still a result.

Secure the motor. Eye protection on. Power off before touching anything mechanical.

1. What does a MOSFET gate look like electrically, and why does that suit a 3.3 V pin?

2. Depletion or enhancement: which is normally on? Which do you want for a motor, and why?

3. Winding 2.5 $\Upomega$ on 5 V: stall current, and the ratio to 16 mA?

4. In a CMOS inverter, why is the static power nearly zero?